SURVEY ON SCHEMES FOR FAULT TOLERANCE OF PARALLEL FILTERS
Author’s Name : Elizabeth Mathew |Abhaya Vikraman
Volume 04 Issue 01 Year 2017 ISSN No: 2349-252X Page no: 10-13
Maintaining high reliability in fault detection is a prominent concern in case of life critical missions. Digital filters are widely used in signal processing and communication systems like Electro Cardio Graph Signal Processors and in unmanned space missions. As the complexity of communications and signal processing systems increases, so does the number of blocks or elements that they have. The increase in complexity also poses reliability challenges and creates the need for fault-tolerant implementations. This paper proposes an efficient coding scheme for making the digital FIR filters fault tolerant and to improve the performance of the filters. Fault tolerance requires hardware redundancy and all the existing techniques uses redundant modules for that. In this technique the hardware utilization of the existing technique is minimized. Our proposed model is area efficient as it reduces the number of redundant modules used for error detection and error correction. For any number of filters number of redundant modules would be the least in this system.
Algorithm Based Fault Tolerance, Algorithmic Soft Error Tolerance, Single Event Effects, FIR filter
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